1. Field of the Invention
The invention relates to an output driving circuit, and more particularly to an output driving circuit preventing generation of a large current when power is on.
2. Description of the Related Art
FIG. 1 shows a conventional output driving circuit. Referring to FIG. 1, an output driving circuit 1 comprises a signal divider 10, a level shifter 11, an inverter 12, and an output driver 13. The signal divider 10 receives an input signal IN and generates driving signals DS10 and DS 11 according to the input signal IN. The level shifter 11 receives the driving signal DS 10 and changes the level of the driving signal DS 10 to generate a voltage signal VS10. The voltage signal VS10 controls a P-type transistor 120 and an N-type transistor 121 within the inverter 12. As shown in FIG. 1, gates of the P-type transistor 120 and the N-type transistor 121 receive the voltage signal VS. The inverter 12 outputs a driving signal DS12 to a P-type transistor 130 in the output driver 13. In the output driver 13, the P-type transistor 130 is controlled by the driving signal DS12, while an N-type transistor 131 is controlled by the driving signal DS 11. The connection node at which the P-type transistor 130 and the N-type transistor 131 are coupled together serves as an output node Nout of the output driving circuit 1 to connect to an output pin. Referring to FIG. 1, the level shifter 11, the inverter 12, and the output driver 13 are coupled to a high voltage source VH.
Since the driving signals DS11 and DS12 are in-phase signals, the P-type transistor 130 and the N-type transistor 131 are turned on simultaneously for a short period of time when the on-off states of the transistors 130 and 131 are switched, so that a large current is generated and passes through the output node Nout. Thus, after the output driving circuit 1 operates for a long period of time, output copper lines and bonding of output pins will become damaged, and the output driving circuit 1 will cease to operate Moreover, since the level shifter 11 and the inverter 12 are coupled to the high voltage source VH, the P-type transistor 120 and the N-type transistor 121 are formed by thick gate oxide layers, thus increasing output driving circuit 1 area.